This invention relates to a technique which is effective when applied to a semiconductor integrated circuit device. more particularly, the present invention relates to a technique which is effective when applied to a semiconductor integrated circuit device provided with small holes or grooves (e.g., moats, or trenches, formed in the substrate surface).
In order to increase memory capacity, the integration density of a semiconductor integrated circuit device equipped with a dynamic random-access memory (hereinafter called "DRAM") using series circuits of a data storage capacitance element and a switching element as memory cells tends to increase.
There has previously been proposed a technique of improving the integration density of a DRAM by forming small holes or grooves (e.g., moats or trenches) in a main surface of a semiconductor substrate by anisotropic etching, and providing an insulating film along the surface within each moat or trench and a conductive layer over the moat or trench to form a vertical data storage capacitance element, and thus reduce the plan area of each memory cell (Japanese Patent Publication No. 12739/1983).
As a result of experiments and studies on this prior technique, however, the inventor has discovered that, since the corners of the small moats or trenches, produced by anisotropic etching, have an acute-angled shape, reductions in the thickness of the insulating film and the electric field concentration are likely to occur at the corners, so that the electrostatic destruction voltage (dielectric breakdown voltage) of the insulating film of each data storage capacitance element drops markedly.
The results of experiments carried out by the present inventor has revealed that the electrostatic destruction voltage of the insulating film of a vertically-formed data storage capacitance element is only about 50 to 60% of the electrostatic destruction voltage of the insulating film of a flat (horizontal) data storage capacitance element.
If the electrostatic destruction voltage of the insulating film of a data storage capacitance element drops, it is very likely that short-circuits will occur between the semiconductor substrate, which is held at a predetermined potential, and a conductive layer which is held at a different potential. If a short-circuit occurs, the charge stored as data will be lost, and hence the electrical reliability of the DRAM will deteriorate.